iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 1 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. the ITR39100 is a high efficiency power amplifier desig ned for use in point to point radio, point to multi-point communications, lmds and other millim eter wave applications. the ITR39100 is a 3- stage gaas mmic amplifie r utilizing an advanced 0.15 m gate length power phemt process and can be used in conjunction with other driver or power amplifiers to achieve the required total power output. description absolute ratings electrical characteristics (at 25c) 50 system, vd=+5 v, quiescent current (idq) = 1000 ma 18 db small signal gain (typ.) 30 dbm saturated power out (typ.) circuit contains individual source vias chip size 4.28 mm x 3.19 mm x 50 m features parameter symbol value unit positive dc voltage (+5 v typical) vd + 6 volts negative dc voltage vg - 2 volts simultaneous (vd - vg) vdg + 8 volts positive dc current i d 1392 ma rf input power (from 50 source) p in 18 dbm operating base plate temperature t c -30 to +85 c storage temperature range t stg -55 to +125 c thermal resistance r jc 9 c/w (channel to backside) parameter min typ max unit frequency range 37 40 ghz gate supply voltage (vg) 1 -0.2 v gain small signal pin=0 dbm 16 18 db gain variation vs. frequency +/-1.5 db power output at p1 db compression 29 dbm power output saturated (pin=+14.5 dbm) 28 30 dbm drain current at pin=0 dbm 1000 ma parameter min typ max unit drain current at p1 db compression 1160 ma drain current at psat 1200 ma power added efficiency (pae) at p1db 17 % oip3 (17 dbm/tone) (10 mhz tone sep.) 35 dbm input return loss (pin=0 dbm) 10 db output return loss (pin=0 dbm) 7 db note: 1. typical range of the negativ e gate voltage is -0.5 to 0.0v to set a typical idq of 1000 ma.
iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 2 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. ground (back of chip) figure 1 functional block diagram application information rf in rf out drain supply (vda & vdb) gate supply (vga & vgb) mmic chip figure 2 chip layout and bond pad locations (chip size=4.28 mm x 3.19 mm x 50 m. back of chip is rf and dc ground) caution: this is an esd sensitive device chip carrier material should be selected to have gaas compatible thermal coefficient of expansion and high thermal conductivity such as copper moly bdenum or copper tungsten. the chip carrier should be machined, finished flat, plated with gold over nickel and should be capable of withstanding 325c for 15 minutes. die attachment for power devices should utilize gold/tin (80/20) eutectic alloy solder and should avoid hydrogen environment for phemt devices. note that the backside of t he chip is gold plated and is used as rf and dc ground. these gaas devices should be handled with care a nd stored in dry nitrogen environment to prevent contamination of bonding surfaces . these are esd sensitive devices and should be handled with appropriate precaution including the use of wrist-grounding straps. all die attach and wire/ribbon bond equipment must be well grounded to prev ent static discharges through the device. recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical allowing for appropriate stress relief. the rf input and output bonds should be typically 12 mils long corresponding to a typical 2 mil gap between the chip and the substrate material. 0.0558? (1.417mm) 0.0699? (1.777mm) 0.0628? (1.597mm) 0.1178? (2.994mm) 0.0 0.0078? (.2mm) 0.0356? (.9mm) 0.0745? (1.893mm) 0.1159? (2.944mm) 0.1595? (4.052mm) 0.168? (4.279mm) 0.0078? (.2mm) 0.1256? (3.190mm) 0.0
iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 3 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. figure 3 recommended application schematic circuit diagram drain supply (vd= +5v) (connect to both vda & vdb) gate supply (vg) (vga and/or vgb) 100 pf 10,000 pf l l bond wire l?s bond wire l?s rf in rf out ground (back of chip) mmic chip 100 pf 10,000 pf l l vd (positive) 100 pf 100 pf 100 pf 100 pf 10,000 pf 10,000 pf 10,000 pf 10,000 pf vg (negative) vg (negative) vd (positive) rf input rf output 5mil thick alumina 50-ohm 5 mil thick alumina 50-ohm 2 mil gap l< 0.015? (4 plcs) die-attach 80au/20sn figure 4 recommended assembly and bonding diagram note: use 0.003? x 0.0005? gold ribbon for bonding. rf input and out put bonds should be less than 0.015? long with stress relief. vd should be biased from 1 supply on both sides as shown. vg can be biased from either or both sides from 1 supply.
iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 4 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. caution: loss of gate voltage (vg) while drain voltage (vd) is present may damage the amplifier chip. the following sequence of steps must be fo llowed to properly test the amplifier: recommended procedure for biasing and operation step 1: turn off rf input power. step 2: connect the dc supply grounds to the ground of the chip carrier. slowly apply negative gate bias supply voltage of -1.5 v to vg. step 3: slowly apply positive drain bias supply voltage of +5 v to vd. step 4: adjust gate bias voltage to set the quiescent current of idq=1000 ma. note: an example of an auto bias sequencing circuit to apply negativ e gate voltage and positive drain voltage for the above procedure is shown below. step 5: after the bias condition is established, the rf input signal may now be applied at the appropriate frequency band. step 6: follow turn-off sequence of: (i) turn off rf input power. (ii) turn down and off drain voltage (vd). (iii) turn down and off gate bias voltage (vg). application information auto-bias circuit
iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 5 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. performance data -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 32 34 36 38 40 42 44 46 frequency (ghz) s21, s11, s22 (db) s21 s22 s11 10c 85 c ITR39100 s-parameters vs. frequency vs. temperature bias vd=5 v, id=1000 ma base plate temp 10, 25, 50, 75, and 85 c ITR39100 power, gain, pae vs. frequency vs. temperature frequency =39 ghz, bias vd=5 v, id=1000 ma base plate temp 10, 25, 50, 75, and 85 c 0 5 10 15 20 25 30 35 4 6 8 10 12 14 16 input power (dbm) output power (dbm), gain (db), pae (%) pout pae gain
iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 6 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. performance data ITR39100 ids vs. pin vs. temperature frequency =39 ghz, bias vd=5 v, id=1000 ma base plate temp 10, 25, 50, 75, and 85 c 900 950 1000 1050 1100 1150 1200 1250 1300 1350 4 6 8 10121416 pin (dbm) ids (ma) ITR39100 saturated power and gain vs. frequency pin = 14.5 dbm, bias vd=5 v, id=1000 ma t=25 c 0 5 10 15 20 25 30 35 37 37.5 38 38.5 39 39.5 40 frequency (ghz) output power (dbm) 0 5 10 15 20 25 30 35 saturated gain (db) pout gain
iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937 fax(650) 424-1938 r3.1 sept. 23, 2004 doc. 1342 page 7 of 7 www.iterrac.com ITR39100 37-40 ghz 1 watt power amplifier mmic this is a production data sheet. se e ?product status definitions? on web site or catalog for product development status. 15 17 19 21 23 25 27 29 31 33 -202468101214 pin (dbm) pout (dbm) 37 ghz 38 ghz 39 ghz 40 ghz ITR39100 power out vs. power in bias vd=5 v, id=1000 ma t=25 c performance data 32 33 34 35 36 37 38 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 output power/tone (dbm) output ip3 (dbm) 37 ghz 38 ghz 39 ghz 40 ghz ITR39100 oip3 vs. output power/tone vd=5.0v idq=1000ma (10 mhz tone sep.)
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